Hardware implementation of algorithms based on artificial intelligence is very important in the world of information technology. These algorithms, which use artificial intelligence concepts and techniques to solve complex problems, are widely used in various fields such as image processing, pattern recognition, signal processing, and intelligent control. The implementation of these algorithms in hardware, in addition to increasing speed and efficiency, also reduces energy consumption and the amount of required resources. For example, using FPGA or ASIC chips to implement an artificial neural network can significantly improve its performance and efficiency. In general, the hardware implementation of artificial intelligence algorithms improves the performance and efficiency of electronic systems and devices and helps competitiveness and innovation in various industries. In this workshop, the following will be analyzed and examined: 1. Preliminary review of algorithms based on artificial intelligence: from sample-based to model-based algorithms 2. Investigating the necessity of hardware implementation of algorithms based on artificial intelligence - artificial internet of things and smart cities based on AI 3. Investigating and analyzing artificial intelligence computing in centralized clouds and moving towards edge devices 4. Types of optimizations that can be done in the hardware implementation of an algorithm based on artificial intelligence 5. Introducing various frameworks for developing a model based on artificial intelligence (focusing on the learning process - architecture in the cloud) 6. Introduction of software containers for the development of models based on artificial intelligence 7. Examining the types of hardware available in the country and the world (candidates of edge devices (inference) or training phase - from MCU to CPU GPU - VPU - DPU - TPU - MPU - IPU and FPGA - DSP - PSOC and SBC 8. Introduction of various frameworks - toolkits and libraries for the hardware implementation of algorithms based on artificial intelligence (with a focus on the inference phase - architecture at the edge) 9. Providing an End to End roadmap for implementing a machine learning and deep learning model on diverse hardware 10. Introducing hardware micro-containers and providing a roadmap to create a hardware container from a machine learning model
All rights reserved by . Designed By : Hamayeshnegar ( Online portal management and Arbitration Conference ) ver.10.0.6